Imaging Processor

The ADCDS-1603 imaging signal processor combines true 16-bit resolution with 3-mpps performance for electronic imaging applications using charge-coupled-device photodetectors.
March 8, 2007

The processor has a signal-to-noise ratio is 85 dB at 3 MHz with no latency delay. Features of the fully integrated 40-pin TDIP package include a user-configurable input amplifier, correlated double sampler, 16-bit sampling analog-to-digital converter, edge triggering, gain adjust, offset adjust, 20-V reference, and a programmable analog bandwidth function. Overall power consumption is 500 mW. The ADCDS has a high-speed, high-accuracy CDS circuit that eliminates the effects of residual charge, charge injection, and kT/C noise on the output capacitor of the CCD.

C&D Technologies Inc., Power Electronics Div.,
11 Cabot Blvd., Mansfield, MA 02048,
(508) 339-3000,
cd4power.com

About the Author

Sign up for Machine Design eNewsletters
Get the latest news and updates.

Voice Your Opinion!

To join the conversation, and become an exclusive member of Machine Design, create an account today!