Board Level Controllers

Nov. 15, 2002
Board-level motion controllers typically contain one or more circuit boards mounted in a card-rack chassis.

Board-level motion controllers typically contain one or more circuit boards mounted in a card-rack chassis. One board generally holds the computer and memory hardware. Another holds the interface for any mass storage such as a hard-disk drive. Other boards may be used to provide input/output hardware for handling loads. For example, a three-axis controller might contain three separate I/O boards, one to drive each of the three-axis motors.

Increasingly, board-level controllers are built to one of several industry standard bus structures. In simple terms, a bus is defined as a circuit that has a single format for all of the connected elements. Most computer systems have three buses: address, data, and control. Together these are defined as the system bus.

There are performance differences among the bus structures in use today. In addition, board sizes for each format differ, making certain formats more optimum for some applications than for others. For example, formats specifying larger boards may be best where it is desirable to combine as many functions as possible on a single board. On the other hand, smaller board formats may be better where space is limited or where vibrations are too severe for large, unsupported circuit boards.

Input/output options for various formats differ as well. It may be possible to find a wide variety of motion-control boards for widely used industrial buses such as STD or Multibus I, but it may be difficult to find the same equipment in Multibus II or VME, which are increasingly deployed in military systems.

The VMEbus is a standard designed by a consortium of companies. The objective of VME developers was to define a set of bus architectures that allows growth from one to another with no change in specification. VME provides 8, 16, 24, or 32-bit addressing. It is an asynchronous bus that allows block-mode transfers and unaligned transfers (where memory blocks do not begin on even-word boundaries).

An older standard called Versabus was designed to handle 68000-based designs. It has largely been supplanted by VME. One major advantage Versabus has over VME, however, is that it uses a larger board, thus allowing each board to contain more circuitry.

Multibus I was once the most widely used platform for 680X0 and 80XXX computer designs. The major strong point of Multibus I is simplicity. It has a 16-bit data bus, 24-bit addressing, an asynchronous protocol, and no multiplexing. It includes sub-buses for local memories. Several features have been added to the original specification to keep performance abreast of technology. For 8 and 16-bit computers, Multibus I is still competitive.

A newer standard called Multibus II is a synchronous bus with five levels of embedded sub-buses. The main bus is 32 bits wide and operates at 40M bytes/sec (10 MHz bits). The local-memory bus is even faster, operating on a 12.5-MHz clock. Whereas an asynchronous bus simply creates wait states to deal with different device speeds, Multibus II solves the problem by using several sub-buses.

The real strength of Multibus II seems to be its potential for sophisticated multiprocessor design. No other bus offers quite as much capability for tightly coupled synchronous operation of many processors and many shared devices.

A number of manufacturers also make boards compatible with other buses such as Q-Bus. It was originally designed for LSI 11 microcomputers. Key attributes of Q-Bus include low cost and simplicity. To save signal lines, address and data are multiplexed. A 4M-byte memory capacity comes from the 22 address bits.

In terms of shear numbers, the PC is the most popular system ever built. The original PC and XT both have a 1M-byte address limitation, with only 640k bytes usable because of memory mapped I/O. Buses on PCs, XTs, and ATs are all synchronous. The PC uses an eight-bit data bus, whereas the XT and AT both use 16-bit data paths. The original clock speed of the PC is 4.7 MHz, but some AT clones now provide clocks of up to 12 MHz and even higher.

It now seems that the AT bus may be enhanced through use of a separate 32-bit memory bus. One manufacturer uses this scheme in desktop machines that employ an AT bus along with the 80386 32-bit processor. Manufacturers of PC-compatible machines have developed a specification called EISA that calls out a similar bus scheme.

The PS/2 machines use a bus architecture that is incompatible with previous PCs or high-end systems. The Micro Channel Architecture (MCA) handles up to 16M bytes of address space. MCA uses a complex bus arbitration to allow several competing devices on the bus to share the address, data, and control lines without conflict.

Under normal circumstances, the processor uses the Micro Channel for memory and I/O accesses, supplying address values and synchronizing control signals. Another interesting feature is that PS/2 I/O devices have a full 16-bit address, instead of the 10-bit address used in PCs, to produce 64k addresses.

The Macintosh II workstations use yet another standard called NuBus and are the first major machines to do so. NuBus supports 8, 16, and 32-bit data transfers and a peak data-transfer rate of 37.5M bytes/sec. The bus allows data interchanges between devices within a 4G-byte address space.

The S-100 bus started out as an interconnection standard for hobby computers and is now used in some industrial applications. This interconnection scheme was refined by an international standards committee into a standard now called the IEEE-P696. However, many experts feel that this standard is not defined well enough for high-performance microcomputer products.

The IEEE 488-bus standard is commonly used in computer control of test instruments. Another standard, the STD bus, uses smaller 4.5 6.5-in. boards. In terms of computing performance, STD and PC-bus processors are often comparable. Physical size of the cards is also similar. Frequently used peripherals such as floppy and hard disks are also available for both formats, and both can be configured to run MS DOS software.

Because of these similarities, either format can be found powering industrial equipment such as NC milling machines or injection-molding machines. But manufacturers that supply both kinds of cards say that a need for high reliability or operation in particularly harsh environments can dictate the use of STD cards.

For example, where some PC-bus cards carry a 90-day warranty at most, STD bus cards performing the same functions can be had with a five-year warranty. Many of these same cards operate over an industrial temperature range of 0 to 65$#176;C. Few PC bus cards, in contrast, are rated for this temperature.

STD cards also have a reputation for ruggedness. They tend to be used in embedded applications where the machine under control cannot be down for long.

STD excels in number and type of I/O cards offered as well. Although the number of I/O cards for the PC is increasing, boards in this format have generally been limited to laboratory monitoring functions for transducers such as thermocouples, or relay cards for on/off controls.

In contrast, a wide range of industrial I/O boards are available for STD. One reason, say manufacturers, is that designing for the STD backplane is straightforward, so much so that 30% of all STD boards are in-house designs developed by end users. This ease further promotes I/O board availability because numerous STD I/O boards are first developed for specific end uses, then commercialized.

The penalty paid to use the STD format is slightly higher prices and incompatibility with PC software. A number of suppliers now provide STD boards that are file compatible with MS DOS. But, as with some PC clones, software that bypasses the operating system to directly manipulate hardware frequently causes problems.

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