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Synopsys Says New Tool Dials in Chip Designs for Reliability and Safety

Sept. 16, 2021
The types of chips used in automotive, medical, aerospace and defense, and other sectors require higher levels of safety—with industry standards such as ISO 26262—and long-term reliability under harsh conditions.

A new software tool introduced on Monday by Synopsys promises to improve the reliability and safety of chips designed for areas ranging from automotive and medical to the aerospace and defense sectors.

One of the world’s largest electronic design automation (EDA) software vendors, Synopsys said the PrimeSim Reliability Analysis solution tests analog, mixed-signal and other pre-production chip designs for failures that could happen at any point in their lifecycle. The Silicon Valley company said it integrated the new tool with PrimeSim Continuum, a unified suite of simulation software that engineers can use to identify areas for improvement without needing to prototype a physical device.

Today, the most advanced chips contain billions of transistors arranged into logic gates, which are in turn bundled into more complicated parts. But it is impossible for chip engineers to verify every detail by hand before the final chip is manufactured. Failure to test the blueprint of a chip for weaknesses can drag out the development process, inflate engineering costs, and increase the risk of premature failure.

That has turned software tools such as PrimeSim Reliability Analysis into an indispensable part of every chip engineer’s toolbox.

But chips used in automobiles, medical, aerospace, defense and other areas require higher levels of safety—with industry standards like ISO 26262—and long-term reliability under harsh conditions. For instance, with the growing amount of electronics in cars, semiconductor-related failures can range from the dashboard display not showing a navigational map to the anti-lock brakes failing.

The problem is that the chips used in cars and other mission-critical systems are getting more complex, making it tougher to dial in designs for high reliability and safety. Synopsys said its customers are rolling out increasingly heterogeneous systems on a chip (SoCs), while other firms are assembling systems in a package (SiPs) out of smaller building blocks called "chiplets" or "tiles" on a larger slab of silicon in a package, which is in many cases paired with high-bandwidth memory (HBM) or other components.

This leaves many more potential points of failure in a chip. Deficiencies in a semiconductor’s design can cause failures relatively early in its lifecycle, while aging can reduce reliability over longer periods of time.

PrimeSim Continuum runs a wide range of simulation engines—including PrimeSim XA, PrimeSim SPICE, PrimeSim Pro (FastSPICE) and PrimeSim HSPICE—and uses them to model different parts of the chip's design far in advance of full production. The new Reliability Analysis uses its simulators to test designs for faults that can lead to failures post-production and pinpoint spots that engineers need to improve.

The solution, tested by many of the major foundries in the semiconductor industry, supports reliability assessments for early-life, midlife and end-of-life failures, Synopsys said. By testing reliability early in development, PrimeSim Reliability Analysis helps diagnose defects and reduce late-stage changes. It can also save customers from over-engineering their chips to make sure they can tolerate harsh conditions.

This new software features both standard and machine learning-based technologies that significantly speed up cell characterization, static circuit checks, power and signal integrity, EM and IR signoff, and aging analysis, as well as safety and test coverage analysis using analog fault simulation. The company said that the tool has been rubber-stamped by TSMC and qualified by Samsung, Intel and GlobalFoundries.

The tool is integrated with Synopsys’ Prime Wave environment, which serves as a central dashboard where users can manage software engines, display results and test out “what-if” situations. The new tool complements Synopsys’ silicon lifecycle management solutions, which use sensors embedded in silicon chips to help improve yields and support preventive maintenance once the chip is out in the field.

Raja Tabet, senior vice president of the custom design and manufacturing group at Synopsys, said the PrimeSim Reliability Analysis tool works with major public cloud services and “represents a pioneering approach to safety and reliability analysis, reimagining design for high reliability.” He stated it also “accelerates lifecycle reliability signoff, offering faster time-to-results and higher chip design productivity.”

Early customers using the tool are AMD, TDK-Micronas, STMicroelectronics and Renesas, the company said.

This article appeared in Electronic Design.

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