Coming to a computer near you: Magnetic Memory

May 3, 2001
Magnets that remember could be the next big thing in computer memory

In read mode, a small current passes through the tunneling barrier of the memory cell. The cell resistance is measured and compared with a reference cell to determine its state (0 or 1). In write mode, a current through the trace above the free magnetic layer generates a magnetic field. The direction of the current determines the type of magnetic moment established in the free magnetic layer. The alignment or nonalignment of the two magnetic layers determines if the cell stores a 0 or a 1.

Recently, Motorola successfully demonstrated a 256-kbit magnetic RAM. The chip had a read/write cycle time of 35 nsec and consumed 24 mW at 3V. Motorola believes such chips may one day replace all existing semiconductor memories.

Some day soon, we may have trouble explaining to our kids the concept of a computer booting up. Just as vacuum-tube radios and their obligatory warm-up time now seem quaint, so too will computers with a boot up delay. Magnetic solidstate memory could make it so.

Besides promising instant-oncomputing, magnetic memorycould also hold the key to minimizing power consumption. With reduced power demands, it may wellbecome the memory of choice forthe growing number of power-hungry portable computing devices.

The attraction of MRAM
Compared to ordinary volatile semiconductor memory, magneto-resistive random access memory (MRAM) seems too good to be true. MRAM combines the three most desirable memory attributes; speed, density, and nonvolatility. This triad is the Holy Grail of computer memory, and it may well help MRAM overtake all other types of memory.

MRAM employs the magnetic tunneling junction principle. It stores data as magnetic moments rather than as electrical charge. A single memory cell consists of two magnetic layers separated by an insulating layer of aluminum oxide known as the tunneling barrier. The first layer has a fixed polarization, the second does not. Polarization of the second layer changes under the influence of a magnetic field generated by an electric current. When the magnetic moments in the two layers are aligned in parallel, a low resistance results. A high resistance results when the two moments are not parallel. These two states, parallel and antiparallel, represent the 1s and 0s of data storage.

To read data, a transistor turns on and pulls current through the memory cell. The resulting voltagedrop is compared with that of a reference cell. Thecomparison determines whether the storage elementrepresents a 0 or 1.

The process of writing data to a cell uses two metal traces. These traces are at right angles to each other and sandwich the MRAM cell between them. One trace actually touches the cell. The other trace is separated from the cell by a layer of insulation. Applying voltages to these two metal lines generates a current which sets up a magnetic field that flips the direction of polarization in the free layer.

Among the biggest design challenges wasfinding a suitable magnetic material. Themain problem was getting one with the rightelectrical resistance.

"When we started this program, the materials available were about 10 million timestoo resistive to be useful," notes StuartParkin, IBM fellow and lead researcher formagnetic storage. In addition, the differencein resistance between the parallel and antiparallel states wasn't large enough to reliably detect a difference.

The solution was to engineer a materialwith a small inherent resistance. This alsoincreased the resistance differential between the parallel and antiparallel states,which made detecting the difference easierand more reliable.

The memory landscape
Data storage generally falls into two distinct categories, magnetic and solid state. The former includes magnetic tape and both floppy and hard disks. On a computer disk drive, a read/write head writes and reads data from a spinning disk coated with magnetic material. Floppy disks work the same way, but with a flexible Mylar substrate.

Volatile semiconductor memory, thatwhich can be rewritten repeatedly withoutever wearing out, can be subdivided into dynamic and static random-access memory, orDRAM and SRAM respectively. Both typesstore ones and zeros as the presence or absence of an electric charge. DRAM uses asstorage elements capacitors that are fabricated onto the silicon die. SRAM storescharge via transistors interconnected toform logic elements (flip-flops).

DRAM chips hold more memory than similarly sized SRAMs because a capacitortakes up less space than the transistors thatmake up a flip-flop. This makes DRAMsmore economical. But a DRAM requires additional circuitry to periodically (every fewmilliseconds) refresh the charge on its capacitive storage elements. Though lessspace-efficient than DRAMs, SRAMs needno refresh circuitry.

For sheer storage capacity, magneticdisks are the hands-down winners. Theirchief drawback, however, is access time.This is the time it takes to position the rightpart of the disk under the read/write head.This can be anywhere from a few hundredmilliseconds to several seconds.

By contrast, semiconductor memory is literally thousands of times faster, with typical access times in the nanosecond range. The problem is that ordinary read/write memory chips are volatile, losing all data when power goes down.

Goodbye to Flash?
Right now, the best in nonvolatile semiconductor memory is Flash. And it's used everywhere from remote controls to cell phones. Problem is, Flash has a limited read/write cycle. It also requires relatively high voltages (up to 12 V) to store data. A charge pump must boost the outside voltage to the necessary programming voltage. In contrast, MRAM requires 3 V without a charge pump.

Memory access times for Flash also tend to be relatively long, anywhere from 60 to 120 nsec. Flash canhave write cycles as long as a millisecond and wearsout after about a million cycles. By contrast, Motorolahas demonstrated MRAM having a write time of35 nsec.

The reason Flash eventually wears out is because ituses electric charge to store data. Charge tunnelingtends to damage the storage material in such a waythat charge leaks off. MRAM uses a tunneling current, too, but just an amount small enough to detect aresistance. There is no known destructive mechanismfor the write or the read cycle. Researchers at Motorola have shown that in over 100 billion cycles,there is no degradation.

In addition, MRAM write cycles use extremely narrow pulses of current. This low-duty cycle lets MRAMconsume much less power than Flash.

From lab to fab
Motorola recently demonstrated a 256-kbit device, the largest MRAM chip built to date. Next comes smaller geometry and higher density. "This device was based on a 0.6- m fabrication process," says Saied Tehrani, Motorola's chief MRAM researcher. "Our offering is going to be at 0.18 m." Smaller geometries will improve speed. Also, as the operating voltage drops, power consumption will continue to decrease as well. Motorola expects to ship samples by 2003, with full-scale production in 2004.

Motorola is focusing on MRAM for so-called systemon-chip (SOC) applications. They are integratingMRAM with the control logic in microcontroller anddigital signal processor chips.

Rather than integrating MRAM withlogic, IBM is treatingit as stand-alonememory. IBM recently penned a dealwith Infineon Technologies in Germanyto begin fabricatingMRAM chips available for sampling in2003.

IBM's Parkin sees MRAM finding a home in portable wireless devices such as PDAs and cell phones.The low power consumption of MRAM is expected tomake it competitive with the most power miserlymemory chips available today.

And the cost is expected to be competitive with comparable semiconductor memories. MRAM combinesthe speed of SRAM, the density of DRAM, and thenonvolatility of Flash into one package. So instead ofbuying three separate types of memory, one MRAMchip will be able to do the job of all three. From a system point of view, this will result in an overall lowercost.

MRAM is poised to take the place of all other semiconductor memories. As Tehrani notes, "It may not replace them overnight, but as time goes on, its performance capabilities can replace many of them."

A quick guide to memory terminology
Volatile memory
FPM DRAM— Fast page mode DRAM puts out data in four-word bursts, speeding up memory throughput.
EDO DRAM— Extended data out DRAM is faster than FPM DRAM. It uses a process called pipelining which starts the next read instruction before the previous one is finished.
SDRAM— Synchronous DRAM shares a clock with the main CPU, eliminating complex timing considerations, and making timing faster and easier.
Rambus DRAM— Claims to be up to 10 times faster than FPM, EDO, and SDRAM. Because memory modules are connected in series, the PC boards must be high quality to support long signal traces running at high clock speeds.
DDR DRAM— Double data rate DRAM works by utilizing both the rising and falling edge of the clock square wave, effectively doubling the data rate.

Nonvolatile memory
EPROM— Electronically programmable read-only memory is an old technology, not suited for portable devices. Data is erased using UV light and must be programmed through a special programmer.
EEPROM—Electronically erasable programmable read-only memory can be erased electronically, making it suitable for portable devices. However, slow write times and limited read/write cycles lessen its appeal.
Flash— Flash has displaced EEPROM as the most common nonvolatile semiconductor memory. However, it too has slow write times and a limited number of read/write cycles.
NVRAM— Nonvolatile RAM is basically an SRAM with a battery backup which retains data after the main power is shut off. One drawback is that it is fairly expensive compared with Flash.

Helpful MRAM links
To learn more about MRAM, check out the following links. IBM's Web site contains the latest press releases on magnetic memory as well as relevant technical papers. Product data sheets and white papers on radiation hardened electronics, including MRAM. NVE Corporation's Web site contains a few white papers on MRAM. Contains the latest news on MRAM developments.

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