High-Performance Resins Take Charge and More

Nov. 8, 1996
Plastics formulations let semiconductor manufacturers boost quality and output

Edited by David S. Hotter

Fred Sanford
Semiconductor Business Manager
DSM Engineering Plastic Products
Reading, Pa.

The rising demand for electronic chips has the semiconductor industry looking for ways to boost production. The easy solution, it would seem, is to run manufacturing and test equipment faster, but speeding up production increases demands on materials.

The answer, engineers are finding, is building semiconductor-manufacturing equipment from high-performance plastics. These engineering resins meet demands by resisting heat, chemicals, and static buildup, and have dimensional stability and high purity.

In charge
Electrostatic discharge (ESD) is a serious problem for semiconductor-equipment manufacturers because it can instantly shut down a production line. Keys to controlling ESD are grounding equipment and eliminating static-generative materials. The latest equipment incorporates inherently static-dissipative and antistatic polymers. An advantage to using polymers for ESD protection is they can be tailored to a desired range of surface and volume resistivity.

One application for ESD materials is in the thermal insulating blocks on semiconductor device handlers that test plastic leaded chip carriers (PLCCs) and memory and programmable chips. Part of the operation conditions chips between –67 and 302°F. As hot and cold air flows through the test cell, electrostatic charge as high as 1,200 V/in. builds on polymer insulating blocks, which can damage an IC when it enters the environmental chamber.

In the past, engineers treated insulating blocks on the handlers with topical antistatic coatings to eliminate electrostatic damage. However, elevated-temperature testing burns off coatings. As a result, recoating parts each shift increased manufacturing costs and machine downtime.

With a surface resistivity of 1010 Ω/X, ESD polymers provide an alternative to antistatic coatings. Panels made from static-dissipative PTFE replace conventional polyetherimide (PEI) insulators that protect test chambers. Besides guarding against electrostatic damage, PTFE has a continuous-use temperature of 500°F and a coefficient of linear thermal expansion of 3.5 x 10-5 in./in./°F. Thus, the fluoropolymers resist high temperatures without distorting or adding stress to the fasteners used to mount panels.

Harsh environments
Maintaining purity is critical as silicon wafers are manufactured into semiconductor devices. Since minute impurities affect performance, workers can’t touch wafers even with gloved hands because they contain fine dust and lint.

To avoid human contact, handheld vacuum wands move wafers from equipment to handling trays. The wands are machined from polyamide-imide (PAI) plate because the resin has low levels of sodium, potassium, and iron ions.

Dimensional stability is also important for wand tips, which have a flat contact surface with a vacuum port and a narrow-diameter hole that runs from port to the base of the tip. With a coefficient of linear thermal expansion of 1.7 x 10-5 in./in./°F, PAI tips press-fit tightly onto stainless-steel tube inserts. The tip surfaces also maintain flat contact, letting the wand draw the most vacuum against wafers.

Another concern engineers face when specifying materials for semiconductor-manufacturing equipment is wear. IC test and burn-in operations, for example, use test sockets that electronically connect to soldered receptacles on printed-circuit boards (PCBs). A PCB’s receptacle has a machined polymer body and female electrical contacts that accept the test socket’s male contacts. The receptacle lets workers easily plug and unplug parts when removing worn sockets, rather than replace expensive PCBs altogether.

Low-cost injection-molded polymer plastic test sockets wear out quickly with repeated use. Machining socket receptacles from PEI plate extends life and reduces overall testing costs, because the resin retains mechanical properties at high temperatures and resists chemicals.

With walls as thin as 0.175 in., PEI receptacles handle the stress of socket installation and also resist cleaning chemicals and solvents. However for applications where IC manufacturers use harsh solvents to clean PCBs, engineers use slightly more expensive polyphenylsulfide (PPS) for added chemical resistance.

Dimensional stability also plays a key role in choosing a material for receptacles, particularly for designs that use an indexing knob to guide 400 to 500 socket contacts into position without bending. With dimensional stability up to 300°F, holes drilled in the female PEI part match the pattern of the male socket pins, which can be as closes as 0.050 in. between centers.

Another environment that attacks equipment is chemical-mechanical polishng. The process uses chemicals and abrasives to produce mirror finishes on wafers. Wafers are held in place by retaining rings made from PPS. The plastic provides dimensional stability and long service life, helping reduce consumables.

Plasma etching, a dry-processing method used to selectively remove material from wafers is also harsh on equipment. Gas plasmas reach temperatures over 212°F, stressing parts such as the retaining rings that hold wafers. While the rings are considered disposables, processors still look for ways to boost their life.

Temperature-resistant polyimides provide the needed strength for gas-plasma processing. Typical rings have 12-in. ODs and are 12 to 34-in. thick. Rings made from polyimide last several times longer than other high-temperature resins and have higher purity.

Operating at temperatures up to 1,200°F, chemical-vapor-deposition furnaces are also harsh on semiconductor-processing equipment. Conventional equipment for removing hot wafers from ovens must withstand temperatures as high as 900°F and resist harsh chemicals. Handling hardware is, therefore, usually made from silicon-carbide ceramic or quartz. The drawback is ceramic materials are brittle and difficult to machine.

Semiconductor manufacturers achieve better ductility at high temperatures by machining handling components such as cradles from polybenzimidazole (PBI) plate. The plastic also resists chemical attack, has higher impact resistance than ceramics, and is less likely to mar the surface of silicon wafers.

Accurate tests
Back-end testing is critical to manufacturing precision semiconductor devices. One such practice is environmental testing in which chips soak in a temperature chamber that ranges from –50 to 310°F.

Pick-and-place handlers use nests to protect semiconductors during testing. The box-shaped parts have four walls and a hole in the bottom panels, used to grip chips by drawing a vacuum. Pins on the chips rest on the box walls, which support and protect the devices during high-speed compression into electrical contacts. However, nests wear from repeated loading cycles.

Therefore, semiconductor equipment manufacturers increase test efficiency by machining nests from PAI plate. With one-half the coefficient of liner thermal expansion of polyimide, PAI is stable over a wide range of temperatures, boosting test reliability and resulting in fewer rejects. The durable plastic nests also last six times longer compared to polyimide versions.

Dimensional stability is also critical since semiconductor devices must precisely fit inside the box-shaped nests at both high and low temperatures. Too much dimensional change can damage circuits and give bad test results. Reinforcing resin with glass fibers helps manufacturers maintain ±0.001 in. in critical nest tolerances. An ancillary benefit of dimensionally stable PAI is it eliminates stress relieving after machining.

© 2010 Penton Media, Inc.

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