Machine Design

Faster computing from reconfigurable processors

The next leap in computer performance may come from letting computer processors reconfigure themselves to operate more efficiently.

Such a computer would be equipped with FPGAs ( field-programmable gate arrays). Computer maker SGI, Mountain View, Calif., says its Reconfigurable Application-Specific Computing (RASC) technology based on FPGA chips crunches through problems in as little as 1 to 3% of the time needed by conventional computers.

Because FPGA logic can be dynamically reconfigured from 100 to 1,000 times/sec, it is possible to optimize the chips for complex, special tasks at speeds that are higher than those available from general-purpose processors. So far, SGI is aiming the technology at calculation-intensive engineering tasks sometimes called high-performance computing or HPC.

A typical application will be at oil and gas companies that have developed algorithms for sizing up rock geology from huge amounts of raw data. Software would configure the FPGA to efficiently compute each algorithm. In effect, the processor becomes a dedicated compute engine for specific routines.

Such reprogramming has historically required high levels of expertise, so FPGA-based acceleration has yet to penetrate HPC markets. However, SGI and companies that build and program FPGAs have developed software for that task as well.

"RASC technology improves on performance, scalability, and bandwidth for data-intensive applications," says Bill Mannel, SGI director of marketing for the server and platform group. The reconfigurable computing technology comes as an add-in module that works with SGI servers.

SGI says compute power can be scaled up by connecting multiple RASC expansion modules into a single shared-memory system. The company has developed RASC technology not only for exploration of oil and gas deposits but also for other applications using Fast-Fourier Transform algorithms. Defense and intelligence areas are expected to benefit from more efficient signal-processing, edge-detection, and pattern-recognition routines.

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